An analog to digital (A/D) converter converts real world analog signals (e.g., sound) to digital representations that can be used in computers and other digital equipment. Among the several types of conventional ADCs are the parallel or flash converter, the successive approximation converter, and the ramp converter. The higher the resolution of the analog to digital converter (or ADC), and the higher the sampling frequency, the more accurate the resulting digital representation of the analog signal.
It is more challenging to design an ADC with high resolution (i.e., with a relatively larger number of parallel output bits) that will also work at high frequencies than to design a lower resolution ADC (i.e., with a relatively smaller number of parallel output bits) that will work at high frequencies. The particular frequency and resolution limits where problems arise in ADC design often depend on the topology that is employed. Typically, a resolution of 8-10 bits is possible in most IC processes. Resolution higher than 10 bits becomes difficult due to factors such as matching requirements and parasitics.
Some conventional designs, typically Sigma-Delta designs, provide 14-16 bit resolution, but such precision comes at the price of relatively low frequency operation. Sigma Delta converters typically operate at frequencies less than 1 MHz. Flash converters are very fast (e.g., 100 MHz), but get very large for more than 6-8 bits resolution. Some specialized ADCs are conventionally produced by using laser trimming for matching, or by using complex calibration routines with extra circuitry to achieve more than 10 bits resolution. Pipelined ADC architectures can operate at frequencies of 50 Mhz, but usually with 8-10 bits resolution. Ultimately, the tradeoff is typically between speed, resolution, and area.
It is desirable in view of the foregoing to provide for A/D conversion with increased bit resolution without sampling frequency penalty.